4-Bit Stochastic Multiplier ASIC
Designed an ASIC that performs 4-bit stochastic multiplication using Wokwi and Verilog. The project involved creating a detailed schematic, simulating the design, and getting it fabricated by TinyTapeout. The design works by first converting 2 4-bit binary inputs into stochastic bit streams using a pseudo-random bitstream (PRBS) and then using an AND gate to perform the multiplication. The ASIC was tested and demonstrated accurate multiplication of stochastic bit streams when using 2-bit inputs, showcasing the potential of stochastic computing in low-power applications. For 4-bit inputs, however, the design ran into issues with the conversion logic and was not able to produce accurate results.
Key Achievements
- Used Wokwi to design and simulate a 4-bit stochastic multiplier circuit
- Fabricated the schematic through TinyTapeout
- Verified the ASIC design using a Mixed-Signal Oscilloscope, ensuring expected I/O logic and timing behavior
- Achieved a design 3.25 times as efficient as typical 4-bit multipliers (225% improvement) in terms of gate count
- Created a program with Dr. David Parent to introduce ASIC design to prospective students with minimal experience
Technologies Used
VerilogWokwiTinyTapeoutDigital DesignASIC DesignMixed-Signal Oscilloscope